In electronic power supply systems having multi-level drive configuration with level balancing action, errors are introduced in the voltage realized at the output due to several factors. Such factors, for example, may include a mis-match in dc levels which are induced by the dynamics of a balancing action of the series capacitors in a multi-level design and by lags in the sampling of the dc voltage levels, modulator transition between voltage levels, and dead-time during switching of the power module.
To mitigate such dead-time distortion during switching, dead-time compensation is used. The dead-time compensation, however, must be guarded against the feasibility of adding dc components. Moreover, in a transformer-less configuration, operating in solidly grounded electronic power supply systems, the common mode dc components in the system require high resistance to ground in order to prevent circulation of dc components.